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author | Takashi Iwai <tiwai@suse.de> | 2009-12-14 18:01:56 +0100 |
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committer | Takashi Iwai <tiwai@suse.de> | 2009-12-14 18:01:56 +0100 |
commit | b89371621e5bedc84498ced2c5c33976bd1b2f64 (patch) | |
tree | b309919239586e25617a17785b827577b1abb6b5 /arch/arm/plat-s5pc1xx/setup-fb-24bpp.c | |
parent | sound: add Edirol UA-101 support (diff) | |
parent | ALSA: sb_mixer: convert pointer tables to mixer control tables (diff) | |
download | linux-b89371621e5bedc84498ced2c5c33976bd1b2f64.tar.xz linux-b89371621e5bedc84498ced2c5c33976bd1b2f64.zip |
Merge branch 'next/isa' into topic/misc
Diffstat (limited to 'arch/arm/plat-s5pc1xx/setup-fb-24bpp.c')
-rw-r--r-- | arch/arm/plat-s5pc1xx/setup-fb-24bpp.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c new file mode 100644 index 000000000000..1a63768a9a2e --- /dev/null +++ b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c @@ -0,0 +1,49 @@ +/* + * linux/arch/arm/plat-s5pc100/setup-fb-24bpp.c + * + * Copyright 2009 Samsung Electronics + * + * Base S5PC1XX setup information for 24bpp LCD framebuffer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/fb.h> +#include <linux/gpio.h> + +#include <mach/regs-fb.h> +#include <mach/map.h> +#include <plat/fb.h> +#include <plat/gpio-cfg.h> +#include <plat/gpio-cfg-s5pc1xx.h> + +#define DISR_OFFSET 0x7008 + +void s5pc100_fb_gpio_setup_24bpp(void) +{ + unsigned int gpio = 0; + + for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } +} |