diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-09-20 01:44:38 +0200 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 12:48:41 +0200 |
| commit | c0468b0244464a9d85e527fd0bfee91caed697a7 (patch) | |
| tree | 5f5f33e08ebca698a1956f94bbf609265c35a547 /arch/arm/plat-samsung/pwm-clock.c | |
| parent | ARM: SAMSUNG: Cleanup mach/clkdev.h (diff) | |
| download | linux-c0468b0244464a9d85e527fd0bfee91caed697a7.tar.xz linux-c0468b0244464a9d85e527fd0bfee91caed697a7.zip | |
ARM: SAMSUNG: Consolidate plat/pwm-clock.h
Removed
- arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
- arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
- arch/arm/mach-s5pc100/include/mach/pwm-clock.h
- arch/arm/mach-s5pv210/include/mach/pwm-clock.h
- arch/arm/mach-exynos4/include/mach/pwm-clock.h
And created
- arch/arm/plat-samsung/include/plat/pwm-clock.h
Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/pwm-clock.c')
| -rw-r--r-- | arch/arm/plat-samsung/pwm-clock.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c index f1bba88ed2f5..a35ff3bcffe4 100644 --- a/arch/arm/plat-samsung/pwm-clock.c +++ b/arch/arm/plat-samsung/pwm-clock.c @@ -27,7 +27,7 @@ #include <plat/cpu.h> #include <plat/regs-timer.h> -#include <mach/pwm-clock.h> +#include <plat/pwm-clock.h> /* Each of the timers 0 through 5 go through the following * clock tree, with the inputs depending on the timers. @@ -339,8 +339,17 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent) unsigned long bits; unsigned long shift = S3C2410_TCFG1_SHIFT(id); + unsigned long mux_tclk; + + if (soc_is_s3c24xx()) + mux_tclk = S3C2410_TCFG1_MUX_TCLK; + else if (soc_is_s5p6440() || soc_is_s5p6450()) + mux_tclk = 0; + else + mux_tclk = S3C64XX_TCFG1_MUX_TCLK; + if (parent == s3c24xx_pwmclk_tclk(id)) - bits = S3C_TCFG1_MUX_TCLK << shift; + bits = mux_tclk << shift; else if (parent == s3c24xx_pwmclk_tdiv(id)) bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; else |