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authorPawel Moll <pawel.moll@arm.com>2012-06-12 17:14:03 +0200
committerPawel Moll <pawel.moll@arm.com>2012-07-12 17:16:56 +0200
commitd927daf5c81c9b6bf2d6a83dc4c8c60268930ee5 (patch)
treee0a45cf8833d54d2b811b1b5a9635b3b8c844084 /arch/arm/plat-versatile/Kconfig
parentARM: vexpress: remove automatic errata workaround selection (diff)
downloadlinux-d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5.tar.xz
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ARM: vexpress: Check master site in daughterboard's sysctl operations
With recent enough motherboard firmware, core tile can be fitted in either of the two daughterboard sites. The non-DT tile code for V2P-CA9 did not check that when configuring DVI output nor setting CLCD pixel clock. Fixed now, providing "get master site" API in motherboard's code. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
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