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author | Will Deacon <will@kernel.org> | 2020-01-22 12:35:05 +0100 |
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committer | Will Deacon <will@kernel.org> | 2020-01-22 12:35:05 +0100 |
commit | ab3906c53144837f1a192b5c3ba71ec2f938c187 (patch) | |
tree | e18d092c350cd73e4c4947193710baf544da59f6 /arch/arm64/Kconfig | |
parent | Merge branch 'for-next/asm-annotations' into for-next/core (diff) | |
parent | arm64: Workaround for Cortex-A55 erratum 1530923 (diff) | |
download | linux-ab3906c53144837f1a192b5c3ba71ec2f938c187.tar.xz linux-ab3906c53144837f1a192b5c3ba71ec2f938c187.zip |
Merge branch 'for-next/errata' into for-next/core
* for-next/errata: (3 commits)
arm64: Workaround for Cortex-A55 erratum 1530923
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Diffstat (limited to 'arch/arm64/Kconfig')
-rw-r--r-- | arch/arm64/Kconfig | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index da590c493ffb..688c5152befd 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -518,9 +518,13 @@ config ARM64_ERRATUM_1418040 If unsure, say Y. +config ARM64_WORKAROUND_SPECULATIVE_AT_VHE + bool + config ARM64_ERRATUM_1165522 bool "Cortex-A76: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" default y + select ARM64_WORKAROUND_SPECULATIVE_AT_VHE help This option adds a workaround for ARM Cortex-A76 erratum 1165522. @@ -530,6 +534,19 @@ config ARM64_ERRATUM_1165522 If unsure, say Y. +config ARM64_ERRATUM_1530923 + bool "Cortex-A55: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" + default y + select ARM64_WORKAROUND_SPECULATIVE_AT_VHE + help + This option adds a workaround for ARM Cortex-A55 erratum 1530923. + + Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with + corrupted TLBs by speculating an AT instruction during a guest + context switch. + + If unsure, say Y. + config ARM64_ERRATUM_1286807 bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation" default y @@ -546,9 +563,13 @@ config ARM64_ERRATUM_1286807 invalidated has been observed by other observers. The workaround repeats the TLBI+DSB operation. +config ARM64_WORKAROUND_SPECULATIVE_AT_NVHE + bool + config ARM64_ERRATUM_1319367 bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" default y + select ARM64_WORKAROUND_SPECULATIVE_AT_NVHE help This option adds work arounds for ARM Cortex-A57 erratum 1319537 and A72 erratum 1319367 |