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| author | Will Deacon <will@kernel.org> | 2020-01-22 12:23:54 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-01-22 12:23:54 +0100 |
| commit | e717d93b1c3f5e263c6c43b6ff0835a1279cb6fc (patch) | |
| tree | bbb457476c0846c3025f392b3746d80b073b669e /arch/arm64/Kconfig | |
| parent | arm64: Use register field helper in kaslr_requires_kpti() (diff) | |
| download | linux-e717d93b1c3f5e263c6c43b6ff0835a1279cb6fc.tar.xz linux-e717d93b1c3f5e263c6c43b6ff0835a1279cb6fc.zip | |
arm64: kconfig: Fix alignment of E0PD help text
Remove the additional space.
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/Kconfig')
| -rw-r--r-- | arch/arm64/Kconfig | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 9cee2008ea9e..aca103ef52b4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1490,13 +1490,13 @@ config ARM64_E0PD bool "Enable support for E0PD" default y help - E0PD (part of the ARMv8.5 extensions) allows us to ensure - that EL0 accesses made via TTBR1 always fault in constant time, - providing similar benefits to KASLR as those provided by KPTI, but - with lower overhead and without disrupting legitimate access to - kernel memory such as SPE. + E0PD (part of the ARMv8.5 extensions) allows us to ensure + that EL0 accesses made via TTBR1 always fault in constant time, + providing similar benefits to KASLR as those provided by KPTI, but + with lower overhead and without disrupting legitimate access to + kernel memory such as SPE. - This option enables E0PD for TTBR1 where available. + This option enables E0PD for TTBR1 where available. endmenu |