diff options
author | Georgii Staroselskii <georgii.staroselskii@emlid.com> | 2019-11-01 10:43:33 +0100 |
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committer | Maxime Ripard <maxime@cerno.tech> | 2019-11-01 10:12:42 +0100 |
commit | 5878524ee09d1d798cc4a870f517ff2ec450632c (patch) | |
tree | ae465708604b3c0c2375988cc2f818b721e5b523 /arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi | |
parent | ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins (diff) | |
download | linux-5878524ee09d1d798cc4a870f517ff2ec450632c.tar.xz linux-5878524ee09d1d798cc4a870f517ff2ec450632c.zip |
arm64: dts: allwinner: bluetooth for Emlid Neutis N5
The Emlid Neutis N5 board has AP6212 BT+WiFi chip. This patch is in
line with 8558c6e21ceb ("ARM: dts: sun8i: h3: bluetooth for Banana Pi
M2 Zero board") and other commits that add Bluetooth support for
similar boards.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi index 82f4b44d525f..5bec574fa108 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi @@ -23,6 +23,8 @@ compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ post-power-on-delay-ms = <200>; + clocks = <&rtc 1>; + clock-names = "ext_clock"; }; }; @@ -56,5 +58,16 @@ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&rtc 1>; + clock-names = "lpo"; + vbat-supply = <®_vcc3v3>; + vddio-supply = <®_vcc3v3>; + shutdown-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */ + device-wakeup-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ + }; }; |