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author | Jerome Brunet <jbrunet@baylibre.com> | 2018-04-26 12:41:19 +0200 |
---|---|---|
committer | Kevin Hilman <khilman@baylibre.com> | 2018-05-10 00:14:50 +0200 |
commit | 098e530362d3824dd9acc553777803d66012d1bd (patch) | |
tree | 3ccbd7888c821be7a159ea5a81ea18a9b7329d9e /arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | |
parent | ARM64: dts: meson-axg: add an 32K alt aoclk (diff) | |
download | linux-098e530362d3824dd9acc553777803d66012d1bd.tar.xz linux-098e530362d3824dd9acc553777803d66012d1bd.zip |
ARM64: dts: meson: add MMC resets
Add reset lines to the mmc controllers of the meson gx and axg SoCs
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index c3b8e0d3fbc9..1cbb0829b15d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -715,6 +715,7 @@ <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_A>; }; &sd_emmc_b { @@ -722,6 +723,7 @@ <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_B>; }; &sd_emmc_c { @@ -729,6 +731,7 @@ <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_C>; }; &spicc { |