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| author | Yixun Lan <yixun.lan@amlogic.com> | 2018-01-11 03:33:58 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2018-02-12 23:15:10 +0100 |
| commit | 58662130226c82b520c0a71b110f1248521f6797 (patch) | |
| tree | 5fee6cb5196664db6ce4760ac3dce971d5dce7af /arch/arm64/boot/dts/amlogic | |
| parent | ARM64: dts: meson-axg: add RMII pins for ethernet controller (diff) | |
| download | linux-58662130226c82b520c0a71b110f1248521f6797.tar.xz linux-58662130226c82b520c0a71b110f1248521f6797.zip | |
ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART
When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order to work properly.
With current logic of the code, the driver will go for the legacy clock probe
routine if it find current compatible string match to 'amlogic,meson-uart',
which result in not requesting the 'pclk' clock, thus break the driver in the end.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 5b5ef27ee7d4..b14841499ee2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -212,17 +212,21 @@ }; uart_A: serial@24000 { - compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + compatible = "amlogic,meson-gx-uart"; reg = <0x0 0x24000 0x0 0x18>; interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; }; uart_B: serial@23000 { - compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + compatible = "amlogic,meson-gx-uart"; reg = <0x0 0x23000 0x0 0x18>; interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; }; }; |