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author | Antoine Tenart <antoine.tenart@free-electrons.com> | 2017-12-26 17:16:53 +0100 |
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committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2018-01-05 17:02:36 +0100 |
commit | e2707a288ce7f325d0762a406622c204df6c7a44 (patch) | |
tree | 7e84e41a1eb29a7920871f2d41de0a27af2c7deb /arch/arm64/boot/dts/marvell/armada-37xx.dtsi | |
parent | Merge branch 'mvebu/fixes' into HEAD (diff) | |
download | linux-e2707a288ce7f325d0762a406622c204df6c7a44.tar.xz linux-e2707a288ce7f325d0762a406622c204df6c7a44.zip |
arm64: dts: marvell: armada-37xx: add a crypto node
This patch adds a crypto node describing the EIP97 engine found in
Armada 37xx SoCs. The cryptographic engine is enabled by default.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-37xx.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 3056d7168e0b..375026867342 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -316,6 +316,20 @@ }; }; + crypto: crypto@90000 { + compatible = "inside-secure,safexcel-eip97"; + reg = <0x90000 0x20000>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mem", "ring0", "ring1", + "ring2", "ring3", "eip"; + clocks = <&nb_periph_clk 15>; + }; + sdhci1: sdhci@d0000 { compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon"; |