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author | Sean Wang <sean.wang@mediatek.com> | 2018-02-17 20:54:43 +0100 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2018-03-11 20:30:19 +0100 |
commit | ae457b7679c4175115c58ec90b36f9ecc855731c (patch) | |
tree | 4db1d55608ccda1d984d2cc9aa594a8b07ef749c /arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | |
parent | arm64: dts: mt7622: turn uart0 clock to real ones (diff) | |
download | linux-ae457b7679c4175115c58ec90b36f9ecc855731c.tar.xz linux-ae457b7679c4175115c58ec90b36f9ecc855731c.zip |
arm64: dts: mt7622: add SoC and peripheral related device nodes
Add watchdog, rtc, auxadc, cir, efuse, rng, uart[1-4], pwm, i2c[0-2],
spi[0-1], btif and thermal related nodes.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
Cc: Zhiyong Tao <zhiyong.tao@mediatek.com>
Cc: Zhi Mao <zhi.mao@mediatek.com>
Cc: Jun Gao <jun.gao@mediatek.com>
Cc: Leilk Liu <leilk.liu@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts index b3878656475c..ba6a79caca21 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts @@ -235,6 +235,34 @@ }; }; +&btif { + status = "okay"; +}; + +&cir { + pinctrl-names = "default"; + pinctrl-0 = <&irrx_pins>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pins>; + status = "okay"; +}; + &pwrap { pinctrl-names = "default"; pinctrl-0 = <&pmic_bus_pins>; @@ -242,6 +270,32 @@ status = "okay"; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spic0_pins>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic1_pins>; + status = "okay"; +}; + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; status = "okay"; }; |