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| author | Luca Weiss <luca.weiss@fairphone.com> | 2023-09-19 14:45:55 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-09-20 20:36:05 +0200 |
| commit | 6da24ba932082bae110feb917a64bb54637fa7c0 (patch) | |
| tree | b7c9e3bdb43a1f897961abc3afbb3a9870003447 /arch/arm64/boot/dts/qcom/sc7280.dtsi | |
| parent | arm64: dts: qcom: msm8939: Fix iommu local address range (diff) | |
| download | linux-6da24ba932082bae110feb917a64bb54637fa7c0.tar.xz linux-6da24ba932082bae110feb917a64bb54637fa7c0.zip | |
arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
With the standard Qualcomm TrustZone setup, components such as lpasscc,
pdc_reset and watchdog shouldn't be touched by Linux. Mark them with
the status 'reserved' and reenable them in the chrome-common dtsi.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20230919-fp5-initial-v2-1-14bb7cedadf5@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 8268a64ff692..66f1eb83cca7 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2296,6 +2296,7 @@ clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_rx_macro: codec@3200000 { @@ -2447,6 +2448,7 @@ clock-names = "bi_tcxo", "bi_tcxo_ao", "iface"; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_core: clock-controller@3900000 { @@ -2457,6 +2459,7 @@ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_cpu: audio@3987000 { @@ -2527,6 +2530,7 @@ clock-names = "bi_tcxo"; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_ag_noc: interconnect@3c40000 { @@ -4217,6 +4221,7 @@ compatible = "qcom,sc7280-pdc-global"; reg = <0 0x0b5e0000 0 0x20000>; #reset-cells = <1>; + status = "reserved"; /* Owned by firmware */ }; tsens0: thermal-sensor@c263000 { @@ -5213,11 +5218,12 @@ }; }; - watchdog@17c10000 { + watchdog: watchdog@17c10000 { compatible = "qcom,apss-wdt-sc7280", "qcom,kpss-wdt"; reg = <0 0x17c10000 0 0x1000>; clocks = <&sleep_clk>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + status = "reserved"; /* Owned by Gunyah hyp */ }; timer@17c20000 { |