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author | Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> | 2022-11-08 15:46:00 +0100 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-10 04:25:52 +0100 |
commit | bd35f4b0179692cacc8cd80aece56012b3b36c69 (patch) | |
tree | 8f4b01bc1aeb2f36d7d5e00668ae9d3f28307f9d /arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | |
parent | arm64: dts: qcom: sc7280-idp: don't modify &ipa twice (diff) | |
download | linux-bd35f4b0179692cacc8cd80aece56012b3b36c69.tar.xz linux-bd35f4b0179692cacc8cd80aece56012b3b36c69.zip |
arm64: dts: qcom: Update soundwire secondary node names
Update soundwire secondary nodes of WSA speaker to match with
dt-bindings pattern properties regular expression.
This modification is required to avoid dtbs-check errors
occurred with qcom,soundwire.yaml.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-2-git-send-email-quic_srivasam@quicinc.com
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts index b712834a5d64..daca1e0ad62a 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts @@ -717,7 +717,7 @@ qcom,mbhc-headphone-vthreshold-microvolt = <50000>; swm: swm@c85 { - left_spkr: wsa8810-left { + left_spkr: speaker@0,3 { compatible = "sdw10217211000"; reg = <0 3>; powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; @@ -726,7 +726,7 @@ #sound-dai-cells = <0>; }; - right_spkr: wsa8810-right { + right_spkr: speaker@0,4 { compatible = "sdw10217211000"; powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; reg = <0 4>; |