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authorSouradeep Chowdhury <schowdhu@codeaurora.org>2020-09-30 10:14:14 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-11-20 04:58:26 +0100
commitbb1f7cf68a2d47c5008050177884be9662673537 (patch)
tree342d0693049da5e0ce7c4a688178db02be84b47d /arch/arm64/boot/dts/qcom/sm8150.dtsi
parentarm64: dts: qcom: sc7180: Assign numbers to eMMC and SD (diff)
downloadlinux-bb1f7cf68a2d47c5008050177884be9662673537.tar.xz
linux-bb1f7cf68a2d47c5008050177884be9662673537.zip
arm64: dts: qcom: sm8150: Add LLC support for sm8150
Add LLCC system cache controller entry for sm8150 to support sm8150 for LLCC. Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org> Link: https://lore.kernel.org/r/8f0e818485941076d62a8dc9f711b0fb868ba080.1601452132.git.schowdhu@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8150.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8150.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index f0a872e02686..838586140c48 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -490,6 +490,13 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ system-cache-controller@9200000 {
+ compatible = "qcom,sm8150-llcc";
+ reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>;
+ reg-names = "llcc_base", "llcc_broadcast_base";
+ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
ufs_mem_hc: ufshc@1d84000 {
compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
"jedec,ufs-2.0";