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author | Ingo Molnar <mingo@kernel.org> | 2020-04-13 09:44:39 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2020-04-13 09:44:39 +0200 |
commit | 3b02a051d25d9600e9d403ad3043aed7de00160e (patch) | |
tree | 5b8f58b79328c04654bf5ab6286401057edeca8f /arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | |
parent | kcsan, trace: Make KCSAN compatible with tracing (diff) | |
parent | Linux 5.7-rc1 (diff) | |
download | linux-3b02a051d25d9600e9d403ad3043aed7de00160e.tar.xz linux-3b02a051d25d9600e9d403ad3043aed7de00160e.zip |
Merge tag 'v5.7-rc1' into locking/kcsan, to resolve conflicts and refresh
Resolve these conflicts:
arch/x86/Kconfig
arch/x86/kernel/Makefile
Do a minor "evil merge" to move the KCSAN entry up a bit by a few lines
in the Kconfig to reduce the probability of future conflicts.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 39 |
1 files changed, 33 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts index d69a613fb65a..aee484a05181 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts @@ -29,6 +29,26 @@ regulator-max-microvolt = <5000000>; }; + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&power_led_gpio>; + + led-0 { + label = "blue:power"; + gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "default-on"; + }; + }; + vcc_sys: vcc-sys { compatible = "regulator-fixed"; regulator-name = "vcc_sys"; @@ -483,6 +503,18 @@ }; }; + ir { + ir_rx: ir-rx { + rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>; + }; + }; + + leds { + power_led_gpio: power-led-gpio { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = @@ -539,10 +571,6 @@ }; }; -&pwm0 { - status = "okay"; -}; - &pwm2 { status = "okay"; pinctrl-0 = <&pwm2_pin_pull_down>; @@ -555,7 +583,7 @@ &sdmmc { clock-frequency = <150000000>; - clock-freq-min-max = <200000 150000000>; + max-frequency = <150000000>; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; @@ -610,7 +638,6 @@ &spi1 { status = "okay"; - max-freq = <10000000>; flash@0 { compatible = "jedec,spi-nor"; |