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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-03-12 15:58:17 +0100 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-03-12 16:32:40 +0100 |
| commit | 7a201e31422b208cfedd15c08e9b0442871e2d97 (patch) | |
| tree | b7da664736c1ae17be3ff041bfe6e58281403a73 /arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | |
| parent | arm64: dts: uniphier: add pinctrl property to eMMC node for LD11/LD20 (diff) | |
| download | linux-7a201e31422b208cfedd15c08e9b0442871e2d97.tar.xz linux-7a201e31422b208cfedd15c08e9b0442871e2d97.zip | |
arm64: dts: uniphier: re-order reset deassertion of USB of LD11
Deassert the bit in the System Control block before the MIO block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 4b54b5677837..151c043b4835 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -320,7 +320,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; - resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, + <&mio_rst 12>; }; usb1: usb@5a810100 { @@ -331,7 +332,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; - resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, + <&mio_rst 13>; }; usb2: usb@5a820100 { @@ -342,7 +344,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; - resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, + <&mio_rst 14>; }; mioctrl@5b3e0000 { |