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authorAndrew Davis <afd@ti.com>2023-08-10 02:38:02 +0200
committerNishanth Menon <nm@ti.com>2023-08-10 05:29:59 +0200
commit6fbd1310f99fc95d063b64d42addf701309663d6 (patch)
tree969c45fbb9b6bcfa58f87a291209354429e4bccf /arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
parentarm64: dts: ti: k3-j784s4: Fix interrupt ranges for wkup & main gpio (diff)
downloadlinux-6fbd1310f99fc95d063b64d42addf701309663d6.tar.xz
linux-6fbd1310f99fc95d063b64d42addf701309663d6.zip
arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721e-main.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j721e-main.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 68a8abf59d24..3c53ddd6a67a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1479,6 +1479,7 @@
ti,itap-del-sel-ddr52 = <0x3>;
ti,trm-icp = <0x8>;
dma-coherent;
+ status = "disabled";
};
main_sdhci1: mmc@4fb0000 {
@@ -1506,6 +1507,7 @@
ti,clkbuf-sel = <0x7>;
dma-coherent;
sdhci-caps-mask = <0x2 0x0>;
+ status = "disabled";
};
main_sdhci2: mmc@4f98000 {
@@ -1533,6 +1535,7 @@
ti,clkbuf-sel = <0x7>;
dma-coherent;
sdhci-caps-mask = <0x2 0x0>;
+ status = "disabled";
};
usbss0: cdns-usb@4104000 {