diff options
| author | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2022-04-21 09:38:05 +0200 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2022-05-10 04:17:00 +0200 |
| commit | 0e7cd4395be5f433b70bde8d902ed50484ee1bc1 (patch) | |
| tree | 5a002b82bed147f857f087d8a4ea681e221444b1 /arch/arm64/boot/dts/toshiba | |
| parent | arm64: dts: visconti: Update the clock providers for UART (diff) | |
| download | linux-0e7cd4395be5f433b70bde8d902ed50484ee1bc1.tar.xz linux-0e7cd4395be5f433b70bde8d902ed50484ee1bc1.zip | |
arm64: dts: visconti: Update the clock providers for I2C
Replace I2C clock with common clock framework.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-3-nobuhiro1.iwamatsu@toshiba.co.jp/
Diffstat (limited to 'arch/arm64/boot/dts/toshiba')
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 9 |
2 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi index f0a93db6dde6..03827ce06ee3 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi @@ -40,5 +40,4 @@ &i2c0 { status = "okay"; - clocks = <&clk150mhz>; }; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 3b51e875630c..048b5dc7ae18 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -284,6 +284,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C0>; status = "disabled"; }; @@ -296,6 +297,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C1>; status = "disabled"; }; @@ -308,6 +310,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C2>; status = "disabled"; }; @@ -320,6 +323,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C3>; status = "disabled"; }; @@ -332,6 +336,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C4>; status = "disabled"; }; @@ -344,6 +349,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C5>; status = "disabled"; }; @@ -356,6 +362,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C6>; status = "disabled"; }; @@ -368,6 +375,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C7>; status = "disabled"; }; @@ -380,6 +388,7 @@ clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C8>; status = "disabled"; }; |