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| author | Thippeswamy Havalige <thippeswamy.havalige@amd.com> | 2024-01-08 16:39:18 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2024-01-22 14:10:10 +0100 |
| commit | 3473622299da09052c41a1166c2389e457128e89 (patch) | |
| tree | 17701631788b9801d927d51cc884ea149e391fb6 /arch/arm64/boot/dts/xilinx | |
| parent | arm64: zynqmp: Describe assigned-clocks for uarts (diff) | |
| download | linux-3473622299da09052c41a1166c2389e457128e89.tar.xz linux-3473622299da09052c41a1166c2389e457128e89.zip | |
arm64: zynqmp: Update ECAM size to discover up to 256 buses
Update ECAM size to discover up to 256 buses.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Link: https://lore.kernel.org/r/4f7621a790f4aa35b3e7f74683d3ae4ffe820667.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'arch/arm64/boot/dts/xilinx')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 7c4f97977df5..4478db46b6a7 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -696,7 +696,7 @@ msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ |