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authorChris Morgan <macromorgan@hotmail.com>2021-08-12 15:46:39 +0200
committerHeiko Stuebner <heiko@sntech.de>2021-09-15 17:50:42 +0200
commite31083f9185928ea093c61152c139bb4c96c7ad2 (patch)
tree0d5a07632801f27d44d29cdc43511c320e7efae6 /arch/arm64/boot/dts
parentarm64: dts: rockchip: Add SFC to RK3308 (diff)
downloadlinux-e31083f9185928ea093c61152c139bb4c96c7ad2.tar.xz
linux-e31083f9185928ea093c61152c139bb4c96c7ad2.zip
arm64: dts: rockchip: Enable SFC for Odroid Go Advance
This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx bus width is set to 2 for this reason, and tx bus width is set to 1 for compatibility reasons. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 7fc674a99a6c..35218c2771a2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -517,6 +517,22 @@
status = "okay";
};
+&sfc {
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
&tsadc {
status = "okay";
};