diff options
author | Peng Fan <peng.fan@nxp.com> | 2020-05-07 07:56:10 +0200 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-05-20 03:24:12 +0200 |
commit | 9e6337e6fdb1573ed0371557505d2292cb78245d (patch) | |
tree | 9b62ed861082f0e0b4488c7f1cdced3bb7b28225 /arch/arm64/boot | |
parent | arm64: dts: freescale: sl28: enable LPUART1 (diff) | |
download | linux-9e6337e6fdb1573ed0371557505d2292cb78245d.tar.xz linux-9e6337e6fdb1573ed0371557505d2292cb78245d.zip |
arm64: dts: imx8m: assign clocks for A53
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, then we could remove
the settings in driver which triggers lockdep warning.
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 10 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 10 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 |
4 files changed, 29 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 8453a657cb5e..764a457e3584 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -519,16 +519,20 @@ <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; - assigned-clocks = <&clk IMX8MM_CLK_NOC>, + assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>, + <&clk IMX8MM_CLK_A53_CORE>, + <&clk IMX8MM_CLK_NOC>, <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, <&clk IMX8MM_SYS_PLL3>, <&clk IMX8MM_VIDEO_PLL1>, <&clk IMX8MM_AUDIO_PLL1>, <&clk IMX8MM_AUDIO_PLL2>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>, + <&clk IMX8MM_ARM_PLL_OUT>, + <&clk IMX8MM_SYS_PLL3_OUT>, <&clk IMX8MM_SYS_PLL1_800M>; - assigned-clock-rates = <0>, + assigned-clock-rates = <0>, <0>, <0>, <400000000>, <400000000>, <750000000>, diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index de6e2cfa8d1e..e5f206d08269 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -426,13 +426,17 @@ <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; - assigned-clocks = <&clk IMX8MN_CLK_NOC>, + assigned-clocks = <&clk IMX8MN_CLK_A53_SRC>, + <&clk IMX8MN_CLK_A53_CORE>, + <&clk IMX8MN_CLK_NOC>, <&clk IMX8MN_CLK_AUDIO_AHB>, <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>, <&clk IMX8MN_SYS_PLL3>; - assigned-clock-parents = <&clk IMX8MN_SYS_PLL3_OUT>, + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>, + <&clk IMX8MN_ARM_PLL_OUT>, + <&clk IMX8MN_SYS_PLL3_OUT>, <&clk IMX8MN_SYS_PLL1_800M>; - assigned-clock-rates = <0>, + assigned-clock-rates = <0>, <0>, <0>, <400000000>, <400000000>, <600000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 8fb11dc8d3b6..ffcc54a69b71 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -360,7 +360,9 @@ <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; - assigned-clocks = <&clk IMX8MP_CLK_NOC>, + assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>, + <&clk IMX8MP_CLK_A53_CORE>, + <&clk IMX8MP_CLK_NOC>, <&clk IMX8MP_CLK_NOC_IO>, <&clk IMX8MP_CLK_GIC>, <&clk IMX8MP_CLK_AUDIO_AHB>, @@ -368,12 +370,15 @@ <&clk IMX8MP_CLK_IPG_AUDIO_ROOT>, <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>, + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_ARM_PLL_OUT>, + <&clk IMX8MP_SYS_PLL2_1000M>, <&clk IMX8MP_SYS_PLL1_800M>, <&clk IMX8MP_SYS_PLL2_500M>, <&clk IMX8MP_SYS_PLL1_800M>, <&clk IMX8MP_SYS_PLL1_800M>; - assigned-clock-rates = <1000000000>, + assigned-clock-rates = <0>, <0>, + <1000000000>, <800000000>, <500000000>, <400000000>, diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 75b384217a23..e72114465223 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -595,8 +595,13 @@ clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; - assigned-clocks = <&clk IMX8MQ_CLK_NOC>; - assigned-clock-rates = <800000000>; + assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>, + <&clk IMX8MQ_CLK_A53_CORE>, + <&clk IMX8MQ_CLK_NOC>; + assigned-clock-rates = <0>, <0>, + <800000000>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_ARM_PLL_OUT>; }; src: reset-controller@30390000 { |