diff options
author | Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> | 2020-07-21 09:13:43 +0200 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-07-22 06:36:21 +0200 |
commit | 4a183020d35c6100095605e2c4a47b80f6e301f3 (patch) | |
tree | 44f820f505c3f133ae02d4540baf7f050f7b2778 /arch/arm64/boot | |
parent | arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators (diff) | |
download | linux-4a183020d35c6100095605e2c4a47b80f6e301f3.tar.xz linux-4a183020d35c6100095605e2c4a47b80f6e301f3.zip |
arm64: dts: qcom: sdm845: Support ETMv4 power management
Add "arm,coresight-loses-context-with-cpu" property to coresight
ETM nodes to avoid failure of trace session because of losing
context on entering deep idle states.
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/20200721071343.2898-1-saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e506793407d8..0b5f063dcaea 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3016,6 +3016,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3035,6 +3036,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3054,6 +3056,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3073,6 +3076,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3092,6 +3096,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3111,6 +3116,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3130,6 +3136,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3149,6 +3156,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { |