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authorPeng Ma <peng.ma@nxp.com>2019-03-11 08:20:13 +0100
committerShawn Guo <shawnguo@kernel.org>2019-04-11 03:34:03 +0200
commit3f3d795804352d4043d83cc4ee4414b5e96e378a (patch)
tree09479f89690ca08c191e0991c7df7c06838252d5 /arch/arm64/boot
parentarm64: dts: imx8mq: Change ahb clock for imx8mq (diff)
downloadlinux-3f3d795804352d4043d83cc4ee4414b5e96e378a.tar.xz
linux-3f3d795804352d4043d83cc4ee4414b5e96e378a.zip
arm64: dts: ls1028a: Corrected the SATA ecc address
Ls1028a SATA ecc address with more than 32 bit, so we should corrrect the address. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8dd3501b1333..b04581249f0b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -297,7 +297,7 @@
sata: sata@3200000 {
compatible = "fsl,ls1028a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>,
- <0x0 0x20140520 0x0 0x4>;
+ <0x7 0x100520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;