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| author | Jon Hunter <jonathanh@nvidia.com> | 2016-06-30 12:56:27 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-07-14 16:20:26 +0200 |
| commit | 241f02ba987baa7bb11b820f8f2f9b71785470e8 (patch) | |
| tree | 5bcf7031eb3ec32b3727b4a427fbba418b56af02 /arch/arm64/boot | |
| parent | arm64: tegra: Add DPAUX pinctrl bindings (diff) | |
| download | linux-241f02ba987baa7bb11b820f8f2f9b71785470e8.tar.xz linux-241f02ba987baa7bb11b820f8f2f9b71785470e8.zip | |
arm64: tegra: Add XUSB powergates on Tegra210
The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 61ec48c4b5b7..443ecd58de98 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -646,6 +646,30 @@ resets = <&tegra_car 198>; #power-domain-cells = <0>; }; + + pd_xusbss: xusba { + clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; + clock-names = "xusb-ss"; + resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; + reset-names = "xusb-ss"; + #power-domain-cells = <0>; + }; + + pd_xusbdev: xusbb { + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; + clock-names = "xusb-dev"; + resets = <&tegra_car 95>; + reset-names = "xusb-dev"; + #power-domain-cells = <0>; + }; + + pd_xusbhost: xusbc { + clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; + clock-names = "xusb-host"; + resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; + reset-names = "xusb-host"; + #power-domain-cells = <0>; + }; }; }; |