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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-09-27 18:59:45 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-10-30 01:25:26 +0100 |
| commit | 34a1c5e39b670fd7a324b5620c9ad4ac80c2f018 (patch) | |
| tree | 4433992109e8a9952d03d5b91571e3f5330ab48d /arch/arm64/boot | |
| parent | arm64: dts: imx8mm-evk: fix missing PMIC's interrupt line pull-up (diff) | |
| download | linux-34a1c5e39b670fd7a324b5620c9ad4ac80c2f018.tar.xz linux-34a1c5e39b670fd7a324b5620c9ad4ac80c2f018.zip | |
arm64: dts: imx8mn-var-som: fix missing PMIC's interrupt line pull-up
The PMIC's interrupt is level low and should be pulled up. The PMIC's
device node had pinctrl-0 property but it lacked pinctrl-names which
is required to apply the pin configuration. The actual problem in DTS
was pointed out by Felix Radensky from Variscite.
Reported-by: Felix Radensky <felix.r@variscite.com>
Fixes: ade0176dd8a0 ("arm64: dts: imx8mn-var-som: Add Variscite VAR-SOM-MX8MN System on Module")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi index a2d0190921e4..7f356edf9f91 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi @@ -116,13 +116,10 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - /* - * The interrupt is not correct. It should be level low, - * however with internal pull up this causes IRQ storm. - */ - interrupts = <8 IRQ_TYPE_EDGE_RISING>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; regulators { @@ -388,7 +385,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x101 + MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; |