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| author | Tang Yuantian <Yuantian.Tang@nxp.com> | 2016-08-09 03:51:22 +0200 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2016-08-10 06:03:33 +0200 |
| commit | 16af080e47785d14919bf94bf8a4097c5c8529fb (patch) | |
| tree | 76764acbf773889be650df25af68d8f3db9be6af /arch/arm64/boot | |
| parent | ahci: qoriq: adjust sata parameter (diff) | |
| download | linux-16af080e47785d14919bf94bf8a4097c5c8529fb.tar.xz linux-16af080e47785d14919bf94bf8a4097c5c8529fb.zip | |
ahci: qoriq: enable snoopable sata read and write
By default the SATA IP on the qoriq SoCs does not generating
coherent/snoopable transactions. This patch enable it in the
sata axicc register.
In addition, the dma-coherent property must be set on the
SATA controller nodes.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index e669fbd7f9c3..e8e4c3ed1b7e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -495,10 +495,11 @@ }; sata: sata@3200000 { - compatible = "fsl,ls1043a-ahci", "fsl,ls1021a-ahci"; + compatible = "fsl,ls1043a-ahci"; reg = <0x0 0x3200000 0x0 0x10000>; interrupts = <0 69 0x4>; clocks = <&clockgen 4 0>; + dma-coherent; }; msi1: msi-controller1@1571000 { diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index 21023a388c29..5ead17c05bb8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -679,6 +679,7 @@ reg = <0x0 0x3200000 0x0 0x10000>; interrupts = <0 133 0x4>; /* Level high type */ clocks = <&clockgen 4 3>; + dma-coherent; }; sata1: sata@3210000 { @@ -687,6 +688,7 @@ reg = <0x0 0x3210000 0x0 0x10000>; interrupts = <0 136 0x4>; /* Level high type */ clocks = <&clockgen 4 3>; + dma-coherent; }; usb0: usb3@3100000 { |