diff options
| author | Vinayak Kale <vkale@apm.com> | 2014-02-05 10:34:36 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-02-05 11:26:35 +0100 |
| commit | 5044bad43ee573d0b6d90e3ccb7a40c2c7d25eb4 (patch) | |
| tree | 552f01828ccc178de0e29e4156592292f753f44d /arch/arm64/include/asm/cacheflush.h | |
| parent | arm64: vdso: prevent ld from aligning PT_LOAD segments to 64k (diff) | |
| download | linux-5044bad43ee573d0b6d90e3ccb7a40c2c7d25eb4.tar.xz linux-5044bad43ee573d0b6d90e3ccb7a40c2c7d25eb4.zip | |
arm64: add DSB after icache flush in __flush_icache_all()
Add DSB after icache flush to complete the cache maintenance operation.
The function __flush_icache_all() is used only for user space mappings
and an ISB is not required because of an exception return before executing
user instructions. An exception return would behave like an ISB.
Signed-off-by: Vinayak Kale <vkale@apm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cacheflush.h')
| -rw-r--r-- | arch/arm64/include/asm/cacheflush.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h index fea9ee327206..889324981aa4 100644 --- a/arch/arm64/include/asm/cacheflush.h +++ b/arch/arm64/include/asm/cacheflush.h @@ -116,6 +116,7 @@ extern void flush_dcache_page(struct page *); static inline void __flush_icache_all(void) { asm("ic ialluis"); + dsb(); } #define flush_dcache_mmap_lock(mapping) \ |