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| author | Xu Kuohai <xukuohai@huawei.com> | 2022-07-11 17:08:21 +0200 |
|---|---|---|
| committer | Daniel Borkmann <daniel@iogearbox.net> | 2022-07-11 21:04:58 +0200 |
| commit | f1e8a24ed2cab1c907bb47ca5f8dee684896456e (patch) | |
| tree | a9101a069b2289e3be70aa8ff8e2f673626e881e /arch/arm64/include/asm/insn.h | |
| parent | bpf: Remove is_valid_bpf_tramp_flags() (diff) | |
| download | linux-f1e8a24ed2cab1c907bb47ca5f8dee684896456e.tar.xz linux-f1e8a24ed2cab1c907bb47ca5f8dee684896456e.zip | |
arm64: Add LDR (literal) instruction
Add LDR (literal) instruction to load data from address relative to PC.
This instruction will be used to implement long jump from bpf prog to
bpf trampoline in the follow-up patch.
The instruction encoding:
3 2 2 2 0 0
0 7 6 4 5 0
+-----+-------+---+-----+-------------------------------------+--------+
| 0 x | 0 1 1 | 0 | 0 0 | imm19 | Rt |
+-----+-------+---+-----+-------------------------------------+--------+
for 32-bit, variant x == 0; for 64-bit, x == 1.
branch_imm_common() is used to check the distance between pc and target
address, since it's reused by this patch and LDR (literal) is not a branch
instruction, rename it to label_imm_common().
Signed-off-by: Xu Kuohai <xukuohai@huawei.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/bpf/20220711150823.2128542-3-xukuohai@huawei.com
Diffstat (limited to 'arch/arm64/include/asm/insn.h')
| -rw-r--r-- | arch/arm64/include/asm/insn.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index 6aa2dc836db1..834bff720582 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h @@ -510,6 +510,9 @@ u32 aarch64_insn_gen_load_store_imm(enum aarch64_insn_register reg, unsigned int imm, enum aarch64_insn_size_type size, enum aarch64_insn_ldst_type type); +u32 aarch64_insn_gen_load_literal(unsigned long pc, unsigned long addr, + enum aarch64_insn_register reg, + bool is64bit); u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1, enum aarch64_insn_register reg2, enum aarch64_insn_register base, |