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| author | Will Deacon <will.deacon@arm.com> | 2017-03-10 21:32:22 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-03-20 17:16:57 +0100 |
| commit | 155433cb365ee4666bdf7c3c7bc2978b17be36a4 (patch) | |
| tree | 43668ce6b2cfffb1327fe5c1054ddc228a108f1a /arch/arm64/include/asm/kvm_mmu.h | |
| parent | arm64: cacheinfo: Remove CCSIDR-based cache information probing (diff) | |
| download | linux-155433cb365ee4666bdf7c3c7bc2978b17be36a4.tar.xz linux-155433cb365ee4666bdf7c3c7bc2978b17be36a4.zip | |
arm64: cache: Remove support for ASID-tagged VIVT I-caches
As a recent change to ARMv8, ASID-tagged VIVT I-caches are removed
retrospectively from the architecture. Consequently, we don't need to
support them in Linux either.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/kvm_mmu.h')
| -rw-r--r-- | arch/arm64/include/asm/kvm_mmu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index ed1246014901..4be5773d4606 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -245,7 +245,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, if (!icache_is_aliasing()) { /* PIPT */ flush_icache_range((unsigned long)va, (unsigned long)va + size); - } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */ + } else { /* any kind of VIPT cache */ __flush_icache_all(); } |