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authorSteven Price <steven.price@arm.com>2019-12-16 12:56:31 +0100
committerWill Deacon <will@kernel.org>2020-01-16 11:44:14 +0100
commit275fa0ea2cf7a84450f9c0ec0d9e7ec168ed2e2d (patch)
tree1a14bb38c7438a57a0f21266e1f81f5d0aed7186 /arch/arm64/include/asm/pgtable-prot.h
parentarm64: Rename WORKAROUND_1319367 to SPECULATIVE_AT_NVHE (diff)
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arm64: Workaround for Cortex-A55 erratum 1530923
Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a result of a speculative AT instruction. This may happen in the middle of a guest world switch while the relevant VMSA configuration is in an inconsistent state, leading to erroneous content being allocated into TLBs. The same workaround as is used for Cortex-A76 erratum 1165522 (WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this mandates the use of VHE on affected parts. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
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