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| author | Marc Zyngier <maz@kernel.org> | 2020-04-21 19:32:02 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-05-28 14:16:55 +0200 |
| commit | d9d7d84d9906e1bc886c5e0fc66aaad26008264b (patch) | |
| tree | c3d9d33afecb36ab5f9ab94c50d66b1103fd3774 /arch/arm64/include/asm/ptrace.h | |
| parent | KVM: arm64: Don't use empty structures as CPU reset state (diff) | |
| download | linux-d9d7d84d9906e1bc886c5e0fc66aaad26008264b.tar.xz linux-d9d7d84d9906e1bc886c5e0fc66aaad26008264b.zip | |
KVM: arm64: Parametrize exception entry with a target EL
We currently assume that an exception is delivered to EL1, always.
Once we emulate EL2, this no longer will be the case. To prepare
for this, add a target_mode parameter.
While we're at it, merge the computing of the target PC and PSTATE in
a single function that updates both PC and CPSR after saving their
previous values in the corresponding ELR/SPSR. This ensures that they
are updated in the correct order (a pretty common source of bugs...).
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/ptrace.h')
| -rw-r--r-- | arch/arm64/include/asm/ptrace.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index bf57308fcd63..953b6a1ce549 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -35,6 +35,7 @@ #define GIC_PRIO_PSR_I_SET (1 << 4) /* Additional SPSR bits not exposed in the UABI */ +#define PSR_MODE_THREAD_BIT (1 << 0) #define PSR_IL_BIT (1 << 20) /* AArch32-specific ptrace requests */ |