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authorSuzuki K Poulose <suzuki.poulose@arm.com>2018-10-09 15:47:07 +0200
committerCatalin Marinas <catalin.marinas@arm.com>2018-10-16 12:53:34 +0200
commit4afe8e79da920bdf6698b01bc668fffc6758f37b (patch)
treed2c1918b8acb95d4b5b36c103c82057cac9cd4a1 /arch/arm64/include
parentarm64: cpufeature: Fix handling of CTR_EL0.IDC field (diff)
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arm64: cpufeature: Trap CTR_EL0 access only where it is necessary
When there is a mismatch in the CTR_EL0 field, we trap access to CTR from EL0 on all CPUs to expose the safe value. However, we could skip trapping on a CPU which matches the safe value. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include')
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