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author | Jean-Philippe Brucker <jean-philippe.brucker@arm.com> | 2019-05-24 14:52:20 +0200 |
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committer | Will Deacon <will.deacon@arm.com> | 2019-05-24 15:58:30 +0200 |
commit | edbcf50eb8aea5f81ae6d83bb969cb0bc02805a1 (patch) | |
tree | b9bec48a44af4df52cb718ae5ae2e7c6ef0f6f02 /arch/arm64/include | |
parent | arm64: insn: Fix ldadd instruction encoding (diff) | |
download | linux-edbcf50eb8aea5f81ae6d83bb969cb0bc02805a1.tar.xz linux-edbcf50eb8aea5f81ae6d83bb969cb0bc02805a1.zip |
arm64: insn: Add BUILD_BUG_ON() for invalid masks
Detect invalid instruction masks at build time. Some versions of GCC can
warn about the situation, but not all of them, it seems.
Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r-- | arch/arm64/include/asm/insn.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index f71b84d9f294..87fdfba13a30 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h @@ -18,6 +18,7 @@ */ #ifndef __ASM_INSN_H #define __ASM_INSN_H +#include <linux/build_bug.h> #include <linux/types.h> /* A64 instructions are always 32 bits. */ @@ -266,11 +267,16 @@ enum aarch64_insn_adr_type { AARCH64_INSN_ADR_TYPE_ADR, }; -#define __AARCH64_INSN_FUNCS(abbr, mask, val) \ -static __always_inline bool aarch64_insn_is_##abbr(u32 code) \ -{ return (code & (mask)) == (val); } \ -static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \ -{ return (val); } +#define __AARCH64_INSN_FUNCS(abbr, mask, val) \ +static __always_inline bool aarch64_insn_is_##abbr(u32 code) \ +{ \ + BUILD_BUG_ON(~(mask) & (val)); \ + return (code & (mask)) == (val); \ +} \ +static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \ +{ \ + return (val); \ +} __AARCH64_INSN_FUNCS(adr, 0x9F000000, 0x10000000) __AARCH64_INSN_FUNCS(adrp, 0x9F000000, 0x90000000) |