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| author | Will Deacon <will.deacon@arm.com> | 2013-06-12 17:28:04 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-09-03 11:18:02 +0200 |
| commit | d50240a5f6ceaf690a77b0fccb17be51cfa151c2 (patch) | |
| tree | 843603100f6987bf50a4e40713121c1e2a323b7f /arch/arm64/include | |
| parent | Move the EM_ARM and EM_AARCH64 definitions to uapi/linux/elf-em.h (diff) | |
| download | linux-d50240a5f6ceaf690a77b0fccb17be51cfa151c2.tar.xz linux-d50240a5f6ceaf690a77b0fccb17be51cfa151c2.zip | |
arm64: mm: permit use of tagged pointers at EL0
TCR.TBI0 can be used to cause hardware address translation to ignore the
top byte of userspace virtual addresses. Whilst not especially useful in
standard C programs, this can be used by JITs to `tag' pointers with
various pieces of metadata.
This patch enables this bit for AArch64 Linux, and adds a new file to
Documentation/arm64/ which describes some potential caveats when using
tagged virtual addresses.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/pgtable-hwdef.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index e182a356c979..d57e66845c86 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -122,5 +122,6 @@ #define TCR_TG1_64K (UL(1) << 30) #define TCR_IPS_40BIT (UL(2) << 32) #define TCR_ASID16 (UL(1) << 36) +#define TCR_TBI0 (UL(1) << 37) #endif |