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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-04-10 12:36:43 +0200 |
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committer | Will Deacon <will.deacon@arm.com> | 2018-04-11 19:49:30 +0200 |
commit | 8892b71885df7d6d7b0f491f9a8e2bb12fd4afdd (patch) | |
tree | 586ec90623998e7b755dbaed4fa139831a79628b /arch/arm64/kernel/Makefile | |
parent | arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening (diff) | |
download | linux-8892b71885df7d6d7b0f491f9a8e2bb12fd4afdd.tar.xz linux-8892b71885df7d6d7b0f491f9a8e2bb12fd4afdd.zip |
arm64: capabilities: Rework EL2 vector hardening entry
Since 5e7951ce19ab ("arm64: capabilities: Clean up midr range helpers"),
capabilities must be represented with a single entry. If multiple
CPU types can use the same capability, then they need to be enumerated
in a list.
The EL2 hardening stuff (which affects both A57 and A72) managed to
escape the conversion in the above patch thanks to the 4.17 merge
window. Let's fix it now.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/Makefile')
0 files changed, 0 insertions, 0 deletions