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| author | Mark Brown <broonie@kernel.org> | 2022-07-04 19:02:40 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-07-05 12:45:45 +0200 |
| commit | 5b345e39d3ebc213904bf959605be056fe53682c (patch) | |
| tree | bd4a282a031f3f90a6391d83e7d00255303ce42b /arch/arm64/kernel/cpu_errata.c | |
| parent | arm64/cache: Restrict which headers are included in __ASSEMBLY__ (diff) | |
| download | linux-5b345e39d3ebc213904bf959605be056fe53682c.tar.xz linux-5b345e39d3ebc213904bf959605be056fe53682c.zip | |
arm64/sysreg: Standardise naming for CTR_EL0 fields
cache.h contains some defines which are used to represent fields and
enumeration values which do not follow the standard naming convention used for
when we automatically generate defines for system registers. Update the
names of the constants to reflect standardised naming and move them to
sysreg.h.
There is also a helper CTR_L1IP() which was open coded and has been
converted to use SYS_FIELD_GET().
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-7-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/kernel/cpu_errata.c')
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c05cc3b6162e..a0dd3ea8f585 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -187,7 +187,7 @@ has_neoverse_n1_erratum_1542419(const struct arm64_cpu_capabilities *entry, int scope) { u32 midr = read_cpuid_id(); - bool has_dic = read_cpuid_cachetype() & BIT(CTR_DIC_SHIFT); + bool has_dic = read_cpuid_cachetype() & BIT(CTR_EL0_DIC_SHIFT); const struct midr_range range = MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1); WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible()); |