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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-03-06 18:15:35 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2018-03-09 14:23:09 +0100 |
commit | ca79acca273630935f2cfdfdf3fc7425ff51ce1c (patch) | |
tree | eb7562df51b97cc6e33b494c9d744744f6dd4a89 /arch/arm64/kernel/module-plts.c | |
parent | arm64/errata: add REVIDR handling to framework (diff) | |
download | linux-ca79acca273630935f2cfdfdf3fc7425ff51ce1c.tar.xz linux-ca79acca273630935f2cfdfdf3fc7425ff51ce1c.zip |
arm64/kernel: enable A53 erratum #8434319 handling at runtime
Omit patching of ADRP instruction at module load time if the current
CPUs are not susceptible to the erratum.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[will: Drop duplicate initialisation of .def_scope field]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/module-plts.c')
-rw-r--r-- | arch/arm64/kernel/module-plts.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/kernel/module-plts.c b/arch/arm64/kernel/module-plts.c index 271b77390de0..fa3637284a3d 100644 --- a/arch/arm64/kernel/module-plts.c +++ b/arch/arm64/kernel/module-plts.c @@ -158,7 +158,8 @@ static unsigned int count_plts(Elf64_Sym *syms, Elf64_Rela *rela, int num, break; case R_AARCH64_ADR_PREL_PG_HI21_NC: case R_AARCH64_ADR_PREL_PG_HI21: - if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_843419)) + if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_843419) || + !cpus_have_const_cap(ARM64_WORKAROUND_843419)) break; /* |