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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-03-31 09:55:33 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-04-04 18:03:32 +0200 |
| commit | 214fad550772929d97fb90a6a2637ebf5a796c11 (patch) | |
| tree | abb9ad6b0c0b87b0d16dded2cc6c0b9a90f18f89 /arch/arm64/kernel/reloc_test_syms.S | |
| parent | arm64: cpufeature: Make ID reg accessor naming less counterintuitive (diff) | |
| download | linux-214fad550772929d97fb90a6a2637ebf5a796c11.tar.xz linux-214fad550772929d97fb90a6a2637ebf5a796c11.zip | |
arm64: relocation testing module
This module tests the module loader's ELF relocation processing
routines. When loaded, it logs output like below.
Relocation test:
-------------------------------------------------------
R_AARCH64_ABS64 0xffff880000cccccc pass
R_AARCH64_ABS32 0x00000000f800cccc pass
R_AARCH64_ABS16 0x000000000000f8cc pass
R_AARCH64_MOVW_SABS_Gn 0xffff880000cccccc pass
R_AARCH64_MOVW_UABS_Gn 0xffff880000cccccc pass
R_AARCH64_ADR_PREL_LO21 0xffffff9cf4d1a400 pass
R_AARCH64_PREL64 0xffffff9cf4d1a400 pass
R_AARCH64_PREL32 0xffffff9cf4d1a400 pass
R_AARCH64_PREL16 0xffffff9cf4d1a400 pass
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/reloc_test_syms.S')
| -rw-r--r-- | arch/arm64/kernel/reloc_test_syms.S | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm64/kernel/reloc_test_syms.S b/arch/arm64/kernel/reloc_test_syms.S new file mode 100644 index 000000000000..e1edcefeb02d --- /dev/null +++ b/arch/arm64/kernel/reloc_test_syms.S @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2017 Linaro, Ltd. <ard.biesheuvel@linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/linkage.h> + +ENTRY(absolute_data64) + ldr x0, 0f + ret +0: .quad sym64_abs +ENDPROC(absolute_data64) + +ENTRY(absolute_data32) + ldr w0, 0f + ret +0: .long sym32_abs +ENDPROC(absolute_data32) + +ENTRY(absolute_data16) + adr x0, 0f + ldrh w0, [x0] + ret +0: .short sym16_abs, 0 +ENDPROC(absolute_data16) + +ENTRY(signed_movw) + movz x0, #:abs_g2_s:sym64_abs + movk x0, #:abs_g1_nc:sym64_abs + movk x0, #:abs_g0_nc:sym64_abs + ret +ENDPROC(signed_movw) + +ENTRY(unsigned_movw) + movz x0, #:abs_g3:sym64_abs + movk x0, #:abs_g2_nc:sym64_abs + movk x0, #:abs_g1_nc:sym64_abs + movk x0, #:abs_g0_nc:sym64_abs + ret +ENDPROC(unsigned_movw) + +#ifndef CONFIG_ARM64_ERRATUM_843419 + +ENTRY(relative_adrp) + adrp x0, sym64_rel + add x0, x0, #:lo12:sym64_rel + ret +ENDPROC(relative_adrp) + +#endif + +ENTRY(relative_adr) + adr x0, sym64_rel + ret +ENDPROC(relative_adr) + +ENTRY(relative_data64) + adr x1, 0f + ldr x0, [x1] + add x0, x0, x1 + ret +0: .quad sym64_rel - . +ENDPROC(relative_data64) + +ENTRY(relative_data32) + adr x1, 0f + ldr w0, [x1] + add x0, x0, x1 + ret +0: .long sym64_rel - . +ENDPROC(relative_data32) + +ENTRY(relative_data16) + adr x1, 0f + ldrsh w0, [x1] + add x0, x0, x1 + ret +0: .short sym64_rel - ., 0 +ENDPROC(relative_data16) |