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| author | Steve Capper <steve.capper@arm.com> | 2018-12-06 23:50:40 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-12-10 19:42:17 +0100 |
| commit | a96a33b1ca57dbea4285893dedf290aeb8eb090b (patch) | |
| tree | 411dca8ab198c3d136b91d3217438c9b3d55ef76 /arch/arm64/kernel/smp.c | |
| parent | arm64: mm: Offset TTBR1 to allow 52-bit PTRS_PER_PGD (diff) | |
| download | linux-a96a33b1ca57dbea4285893dedf290aeb8eb090b.tar.xz linux-a96a33b1ca57dbea4285893dedf290aeb8eb090b.zip | |
arm64: mm: Prevent mismatched 52-bit VA support
For cases where there is a mismatch in ARMv8.2-LVA support between CPUs
we have to be careful in allowing secondary CPUs to boot if 52-bit
virtual addresses have already been enabled on the boot CPU.
This patch adds code to the secondary startup path. If the boot CPU has
enabled 52-bit VAs then ID_AA64MMFR2_EL1 is checked to see if the
secondary can also enable 52-bit support. If not, the secondary is
prevented from booting and an error message is displayed indicating why.
Technically this patch could be implemented using the cpufeature code
when considering 52-bit userspace support. However, we employ low level
checks here as the cpufeature code won't be able to run if we have
mismatched 52-bit kernel va support.
Signed-off-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/smp.c')
| -rw-r--r-- | arch/arm64/kernel/smp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 96b8f2f51ab2..e15b0b64d4d0 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -108,6 +108,7 @@ static int boot_secondary(unsigned int cpu, struct task_struct *idle) } static DECLARE_COMPLETION(cpu_running); +bool va52mismatch __ro_after_init; int __cpu_up(unsigned int cpu, struct task_struct *idle) { @@ -137,6 +138,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) if (!cpu_online(cpu)) { pr_crit("CPU%u: failed to come online\n", cpu); + + if (IS_ENABLED(CONFIG_ARM64_52BIT_VA) && va52mismatch) + pr_crit("CPU%u: does not support 52-bit VAs\n", cpu); + ret = -EIO; } } else { |