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authorCatalin Marinas <catalin.marinas@arm.com>2014-03-24 11:35:35 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2014-03-24 11:35:35 +0100
commit196adf2f3015eacac0567278ba538e3ffdd16d0e (patch)
tree2dc6514b3263a9f3ed69b3b0ff34ef908afa5af7 /arch/arm64/kernel/smp.c
parentarm64: Support DMA_ATTR_WRITE_COMBINE (diff)
downloadlinux-196adf2f3015eacac0567278ba538e3ffdd16d0e.tar.xz
linux-196adf2f3015eacac0567278ba538e3ffdd16d0e.zip
arm64: Remove pgprot_dmacoherent()
Since this macro is identical to pgprot_writecombine() and is only used in a single place, remove it completely to avoid confusion. On ARMv7+ processors, the coherent DMA mapping must be Normal NonCacheable (a.k.a. writecombine) to avoid mismatched hardware attribute aliases (with the kernel linear mapping as Normal Cacheable). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/smp.c')
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