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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2014-08-08 13:51:40 +0200
committerWill Deacon <will.deacon@arm.com>2014-09-08 15:39:18 +0200
commit169c018de7b6d376f821f9fae0ab23dc5c7bb549 (patch)
tree8c008b183e64a8512268405fb8fd85a74a26b932 /arch/arm64/kernel/smp_spin_table.c
parentarm64: add helper functions to read I-cache attributes (diff)
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arm64: don't flag non-aliasing VIPT I-caches as aliasing
VIPT caches are non-aliasing if the index is derived from address bits that are always equal between VA and PA. Classifying these as aliasing results in unnecessary flushing which may hurt performance. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/smp_spin_table.c')
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