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authorWill Deacon <will.deacon@arm.com>2015-10-06 19:46:23 +0200
committerCatalin Marinas <catalin.marinas@arm.com>2015-10-07 12:45:27 +0200
commit8e63d38876691756f9bc6930850f1fb77809be1b (patch)
tree74f5a739675a90c71d1f07e937c2e3f512781b7e /arch/arm64/kernel/suspend.c
parentarm64: proc: de-scope TLBI operation during cold boot (diff)
downloadlinux-8e63d38876691756f9bc6930850f1fb77809be1b.tar.xz
linux-8e63d38876691756f9bc6930850f1fb77809be1b.zip
arm64: flush: use local TLB and I-cache invalidation
There are a number of places where a single CPU is running with a private page-table and we need to perform maintenance on the TLB and I-cache in order to ensure correctness, but do not require the operation to be broadcast to other CPUs. This patch adds local variants of tlb_flush_all and __flush_icache_all to support these use-cases and updates the callers respectively. __local_flush_icache_all also implies an isb, since it is intended to be used synchronously. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: David Daney <david.daney@cavium.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/suspend.c')
-rw-r--r--arch/arm64/kernel/suspend.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c
index 8297d502217e..3c5e4e6dcf68 100644
--- a/arch/arm64/kernel/suspend.c
+++ b/arch/arm64/kernel/suspend.c
@@ -90,7 +90,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
else
cpu_switch_mm(mm->pgd, mm);
- flush_tlb_all();
+ local_flush_tlb_all();
/*
* Restore per-cpu offset before any kernel