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| author | Marc Zyngier <maz@kernel.org> | 2022-06-30 18:05:00 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-07-01 16:22:52 +0200 |
| commit | 18c9aa490795745e67e30816fa9b4fafab2df7dc (patch) | |
| tree | af3d3369de2ccde38db9a4c9ca596855e8b860ba /arch/arm64/kernel | |
| parent | arm64: Add the arm64.nosve command line option (diff) | |
| download | linux-18c9aa490795745e67e30816fa9b4fafab2df7dc.tar.xz linux-18c9aa490795745e67e30816fa9b4fafab2df7dc.zip | |
arm64: Add an override for ID_AA64SMFR0_EL1.FA64
Add a specific override for ID_AA64SMFR0_EL1.FA64, which
disables the full A64 streaming SVE mode.
Note that no alias is provided for this, as this is already
covered by arm64.nosme, and is only added as a debugging
facility.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220630160500.1536744-10-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/hyp-stub.S | 15 | ||||
| -rw-r--r-- | arch/arm64/kernel/idreg-override.c | 11 |
2 files changed, 19 insertions, 7 deletions
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S index d6b0a70a7080..3dcc3272ce16 100644 --- a/arch/arm64/kernel/hyp-stub.S +++ b/arch/arm64/kernel/hyp-stub.S @@ -122,17 +122,18 @@ SYM_CODE_START_LOCAL(__finalise_el2) msr sctlr_el2, x1 isb - mov x1, #0 // SMCR controls + mov x0, #0 // SMCR controls - mrs_s x2, SYS_ID_AA64SMFR0_EL1 - ubfx x2, x2, #ID_AA64SMFR0_FA64_SHIFT, #1 // Full FP in SM? - cbz x2, .Lskip_sme_fa64 + // Full FP in SM? + mrs_s x1, SYS_ID_AA64SMFR0_EL1 + __check_override id_aa64smfr0 ID_AA64SMFR0_FA64_SHIFT 1 .Linit_sme_fa64 .Lskip_sme_fa64 - orr x1, x1, SMCR_ELx_FA64_MASK +.Linit_sme_fa64: + orr x0, x0, SMCR_ELx_FA64_MASK .Lskip_sme_fa64: - orr x1, x1, #SMCR_ELx_LEN_MASK // Enable full SME vector - msr_s SYS_SMCR_EL2, x1 // length for EL1. + orr x0, x0, #SMCR_ELx_LEN_MASK // Enable full SME vector + msr_s SYS_SMCR_EL2, x0 // length for EL1. mrs_s x1, SYS_SMIDR_EL1 // Priority mapping supported? ubfx x1, x1, #SMIDR_EL1_SMPS_SHIFT, #1 diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c index 7cca82639606..aa2a53d0d417 100644 --- a/arch/arm64/kernel/idreg-override.c +++ b/arch/arm64/kernel/idreg-override.c @@ -127,6 +127,16 @@ static const struct ftr_set_desc isar2 __initconst = { }, }; +static const struct ftr_set_desc smfr0 __initconst = { + .name = "id_aa64smfr0", + .override = &id_aa64smfr0_override, + .fields = { + /* FA64 is a one bit field... :-/ */ + { "fa64", ID_AA64SMFR0_FA64_SHIFT, 1, }, + {} + }, +}; + extern struct arm64_ftr_override kaslr_feature_override; static const struct ftr_set_desc kaslr __initconst = { @@ -146,6 +156,7 @@ static const struct ftr_set_desc * const regs[] __initconst = { &pfr1, &isar1, &isar2, + &smfr0, &kaslr, }; |