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authorMarc Zyngier <marc.zyngier@arm.com>2018-05-17 12:05:08 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2018-07-09 12:37:41 +0200
commit09605e94c2cbb67c6472c07e1c06a7a0e7271f83 (patch)
tree07619151aabc42a82224d7ef09b48184745edb12 /arch/arm64/kvm/sys_regs.c
parentarm64: KVM: Add support for Stage-2 control of memory types and cacheability (diff)
downloadlinux-09605e94c2cbb67c6472c07e1c06a7a0e7271f83.tar.xz
linux-09605e94c2cbb67c6472c07e1c06a7a0e7271f83.zip
arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present
Set/Way handling is one of the ugliest corners of KVM. We shouldn't have to handle that, but better safe than sorry. Thankfully, FWB fixes this for us by not requiering any maintenance (the guest is forced to use cacheable memory, no matter what it says, and the whole system is garanteed to be cache coherent), which means we don't have to emulate S/W CMOs, and don't have to track VM ops either. We still have to trap S/W though, if only to prevent the guest from doing something bad. Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/kvm/sys_regs.c')
-rw-r--r--arch/arm64/kvm/sys_regs.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index a4363735d3f8..774d72155904 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -194,7 +194,16 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
if (!p->is_write)
return read_from_write_only(vcpu, p, r);
- kvm_set_way_flush(vcpu);
+ /*
+ * Only track S/W ops if we don't have FWB. It still indicates
+ * that the guest is a bit broken (S/W operations should only
+ * be done by firmware, knowing that there is only a single
+ * CPU left in the system, and certainly not from non-secure
+ * software).
+ */
+ if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
+ kvm_set_way_flush(vcpu);
+
return true;
}