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author | Catalin Marinas <catalin.marinas@arm.com> | 2013-05-07 19:02:58 +0200 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-05-08 11:33:17 +0200 |
commit | 420c158dcf96ee3a5758c9bf1586b163584c75c7 (patch) | |
tree | e9cc98dbd2bf308b4d1b2ac58eb8659342ca7aca /arch/arm64/lib | |
parent | arm64: Ignore the 'write' ESR flag on cache maintenance faults (diff) | |
download | linux-420c158dcf96ee3a5758c9bf1586b163584c75c7.tar.xz linux-420c158dcf96ee3a5758c9bf1586b163584c75c7.zip |
arm64: Treat the bitops index argument as an 'int'
The bitops prototype use an 'int' as the bit index type but the asm
implementation assume it to be a 'long'. Since the compiler does not
guarantee zeroing the upper 32-bits in a register when used as 'int',
change the bitops implementation accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/lib')
-rw-r--r-- | arch/arm64/lib/bitops.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/lib/bitops.S b/arch/arm64/lib/bitops.S index 36216d30cb9a..e5db797790d3 100644 --- a/arch/arm64/lib/bitops.S +++ b/arch/arm64/lib/bitops.S @@ -21,13 +21,13 @@ /* * x0: bits 5:0 bit offset - * bits 63:6 word offset + * bits 31:6 word offset * x1: address */ .macro bitop, name, instr ENTRY( \name ) - and x3, x0, #63 // Get bit offset - eor x0, x0, x3 // Clear low bits + and w3, w0, #63 // Get bit offset + eor w0, w0, w3 // Clear low bits mov x2, #1 add x1, x1, x0, lsr #3 // Get word offset lsl x3, x2, x3 // Create mask @@ -41,8 +41,8 @@ ENDPROC(\name ) .macro testop, name, instr ENTRY( \name ) - and x3, x0, #63 // Get bit offset - eor x0, x0, x3 // Clear low bits + and w3, w0, #63 // Get bit offset + eor w0, w0, w3 // Clear low bits mov x2, #1 add x1, x1, x0, lsr #3 // Get word offset lsl x4, x2, x3 // Create mask |