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| author | Catalin Marinas <catalin.marinas@arm.com> | 2014-04-02 18:55:40 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-04-03 11:43:11 +0200 |
| commit | 35a86976924a9eda7775b5b02ad47268dca1a5b4 (patch) | |
| tree | 8adb3553d3443c9d37997c129b8ca1b6f616afbe /arch/arm64/mm/cache.S | |
| parent | ARM: topology: Make it clear that all CPUs need to be described (diff) | |
| download | linux-35a86976924a9eda7775b5b02ad47268dca1a5b4.tar.xz linux-35a86976924a9eda7775b5b02ad47268dca1a5b4.zip | |
arm64: Update the TCR_EL1 translation granule definitions for 16K pages
The current TCR register setting in arch/arm64/mm/proc.S assumes that
TCR_EL1.TG* fields are one bit wide and bit 31 is RES1 (reserved, set to
1). With the addition of 16K pages (currently unsupported in the
kernel), the TCR_EL1.TG* fields have been extended to two bits. This
patch updates the corresponding Linux definitions and drops the bit 31
setting in proc.S in favour of the new macros.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Joe Sylve <joe.sylve@gmail.com>
Diffstat (limited to 'arch/arm64/mm/cache.S')
0 files changed, 0 insertions, 0 deletions