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| author | Thomas Gleixner <tglx@linutronix.de> | 2017-03-09 12:06:41 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-03-09 12:06:41 +0100 |
| commit | 920c634aff6cb66e7f352668521eb1313897e93c (patch) | |
| tree | 0f2e2eb15756fdd93c8ea47f9080fc3c1abeeae6 /arch/arm64/mm/proc.S | |
| parent | irqchip/crossbar: Fix incorrect type of local variables (diff) | |
| parent | irqchip/crossbar: Fix incorrect type of register size (diff) | |
| download | linux-920c634aff6cb66e7f352668521eb1313897e93c.tar.xz linux-920c634aff6cb66e7f352668521eb1313897e93c.zip | |
Merge tag 'irq-fixes-4.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip/irqdomain updates for 4.11-rc2 from Marc Zyngier
- irqchip/crossbar: Some type tidying up
- irqchip/gicv3-its: Workaround for a Qualcomm erratum
- irqdomain: Compile for for systems that don't use CONFIG_IRQ_DOMAIN
Fixed up minor conflict in the crossbar driver.
Diffstat (limited to 'arch/arm64/mm/proc.S')
| -rw-r--r-- | arch/arm64/mm/proc.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index cd4d53d7e458..877d42fb0df6 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -138,7 +138,7 @@ ENDPROC(cpu_do_resume) * - pgd_phys - physical address of new TTB */ ENTRY(cpu_do_switch_mm) - pre_ttbr0_update_workaround x0, x1, x2 + pre_ttbr0_update_workaround x0, x2, x3 mmid x1, x1 // get mm->context.id bfi x0, x1, #48, #16 // set the ASID msr ttbr0_el1, x0 // set TTBR0 |