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authorWill Deacon <will.deacon@arm.com>2015-08-20 12:47:13 +0200
committerWill Deacon <will.deacon@arm.com>2015-08-20 17:17:58 +0200
commitd8d23fa0f27f3b2942a7bbc7378c7735324ed519 (patch)
tree2b7dd9735a738778ceb99d5c357a293daf64f4df /arch/arm64/mm/proc.S
parentarm64: kconfig: Move LIST_POISON to a safe value (diff)
downloadlinux-d8d23fa0f27f3b2942a7bbc7378c7735324ed519.tar.xz
linux-d8d23fa0f27f3b2942a7bbc7378c7735324ed519.zip
arm64: mdscr_el1: avoid exposing DCC to userspace
We don't want to expose the DCC to userspace, particularly as there is a kernel console driver for it. This patch resets mdscr_el1 to disable userspace access to the DCC registers on the cold boot path. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/mm/proc.S')
-rw-r--r--arch/arm64/mm/proc.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 6e8765a2bddd..e4ee7bd8830a 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -151,7 +151,8 @@ ENTRY(__cpu_setup)
mov x0, #3 << 20
msr cpacr_el1, x0 // Enable FP/ASIMD
- msr mdscr_el1, xzr // Reset mdscr_el1
+ mov x0, #1 << 12 // Reset mdscr_el1 and disable
+ msr mdscr_el1, x0 // access to the DCC from EL0
/*
* Memory region attributes for LPAE:
*