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| author | Will Deacon <will.deacon@arm.com> | 2018-05-21 20:14:22 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-05-23 12:33:45 +0200 |
| commit | 7bd99b403405d329b9b72f6bae6a07c10bfa1b95 (patch) | |
| tree | ee1195ab483e0d8e9c27f46af1d325b051c511e1 /arch/arm64/mm | |
| parent | arm64/sve: Write ZCR_EL1 on context switch only if changed (diff) | |
| download | linux-7bd99b403405d329b9b72f6bae6a07c10bfa1b95.tar.xz linux-7bd99b403405d329b9b72f6bae6a07c10bfa1b95.zip | |
arm64: Kconfig: Enable LSE atomics by default
Now that we're seeing CPUs shipping with LSE atomics, default them to
'on' in Kconfig. CPUs without the instructions will continue to use
LDXR/STXR-based sequences, but they will be placed out-of-line by the
compiler.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm')
0 files changed, 0 insertions, 0 deletions