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authorCatalin Marinas <catalin.marinas@arm.com>2013-04-30 16:58:37 +0200
committerCatalin Marinas <catalin.marinas@arm.com>2013-04-30 16:58:37 +0200
commit16c85a1fd73eade2ae290d759924c09b4595f504 (patch)
tree6b9258d8c9836a19294924a971d5e9981ee609df /arch/arm64
parentarm64: klib: bitops: fix unpredictable stxr usage (diff)
downloadlinux-16c85a1fd73eade2ae290d759924c09b4595f504.tar.xz
linux-16c85a1fd73eade2ae290d759924c09b4595f504.zip
arm64: Use acquire/release semantics instead of explicit DMB
This patch changes the test_and_*_bit functions to use the load-acquire/store-release instructions instead of explicit DMB. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/lib/bitops.S6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm64/lib/bitops.S b/arch/arm64/lib/bitops.S
index eaed8bbd78fc..36216d30cb9a 100644
--- a/arch/arm64/lib/bitops.S
+++ b/arch/arm64/lib/bitops.S
@@ -46,13 +46,11 @@ ENTRY( \name )
mov x2, #1
add x1, x1, x0, lsr #3 // Get word offset
lsl x4, x2, x3 // Create mask
- smp_dmb ish
-1: ldxr x2, [x1]
+1: ldaxr x2, [x1]
lsr x0, x2, x3 // Save old value of bit
\instr x2, x2, x4 // toggle bit
- stxr w5, x2, [x1]
+ stlxr w5, x2, [x1]
cbnz w5, 1b
- smp_dmb ish
and x0, x0, #1
3: ret
ENDPROC(\name )