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authorArnd Bergmann <arnd@arndb.de>2017-10-30 10:20:45 +0100
committerArnd Bergmann <arnd@arndb.de>2017-10-30 10:20:45 +0100
commit36a247ba728b68383e53b4cf11111801ec3ceecd (patch)
treed1a6c1082164e6e68bfd2db88cfdc83739987ef8 /arch/arm64
parentLinux 4.14-rc7 (diff)
parentarm64: dts: uniphier: add STDMAC clock to EHCI nodes (diff)
downloadlinux-36a247ba728b68383e53b4cf11111801ec3ceecd.tar.xz
linux-36a247ba728b68383e53b4cf11111801ec3ceecd.zip
Merge tag 'uniphier-fixes-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into fixes
Pull "UniPhier ARM SoC fixes for v4.14" from Masahiro Yamada: - Add necessary clock to EHCI node * tag 'uniphier-fixes-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: add STDMAC clock to EHCI nodes ARM: dts: uniphier: add STDMAC clock to EHCI nodes
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index ee4aff53a5f5..09c429cb6d61 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -299,7 +299,8 @@
interrupts = <0 243 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
- clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
+ clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
+ <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
};
@@ -311,7 +312,8 @@
interrupts = <0 244 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
- clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
+ clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
+ <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
};
@@ -323,7 +325,8 @@
interrupts = <0 245 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
+ clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
+ <&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
};